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Welcome to Latest Chipset News.

  • IBM has announced new chip-making technology that should significantly increase the battery life of handheld devices and boost the processor speed up to 35 percent.

  • Two New Chipsets 440GX, 450NX from Intel.440GX has SDRAM support and AGP but limited 2 Xeons and 2GB memory.450NX has no AGP has PCI, no SDRAM support but EDO also can support 4 Xeons and 8GB Memory

  • A New Slot, Slot 2 with 100MHz Front Side Bus and with 450 NX chipset support up to 4 Xeon (Slot 2) Processors

  • VIA Technologies jump on the Pentium II chipset bandwagon. And its new Apollo Pro AGPset is the first available alternative Slot-1 core logic chipset. The Apollo Pro is a two-chip set supporting both desktop and mobile designs. VIA's new Apollo Pro VT82C691 north bridge core logic chip is a new south bridge, the VT82C596, which also upgrades the Apollo MVP3 Socket-7 chipset. The north bridge features 100MHz support for Slot-1 processors. It also provides synchronous and pseudo-synchronous CPU/AGP/PCI operation and support for the full range of currently available DRAMs including PC100 SDRAM.
    The VT82C596 south bridge supports both Socket-7 and Slot-1 PC system designs and is the first device offering support for the emerging ATA-66 disk drive interface standard. ATA-66, also known as ULTRA DMA 66, effectively doubles drive data transfer rates. The south bridge also provides PC98 ACPI, UDMA and USB support:The two-chip Apollo Pro desktop/mobile chipset includes:
    • Slot-1 -compatible CPU bus supporting Intel's Pentium II
    • 66/100 MHz CPU bus
    • 66/100 MHz Memory bus
    • Up to 1GB 64Mbit PC100 SDRAM support
    • AGP 2x support
    • Advanced clock features
    • The VT82C596 South Bridge adds enhanced notebook features including:
    • POS, STD, and STR suspend states
    • Support for processor bus lower than 3.3v.
    • Intelligent clock gating for increased battery life
    • Modular power and PCI bus power management
    • Hardware SMBus interface
  • ALi Aladdin V Socket-7 chipset with 100 MHz Support :
    • Host Bridge M1541 and PCI-to-ISA bridge M1543
    • PCI and AGP bus run pseudo-synchroneous
    • L2 cache size 256 KB, 512 KB or 1 MB
    • Cacheable area of 256 MB with 256 KB cache and 512 MB with 512 KB
    • Full ECC and parity support
    • 5 PCI busmaster slots, AGP x2 support
    • Linear burst mode support for Cyrix/IBM CPUs
  • VIA's Apollo MVP3 Socket-7 chipset with 100 MHz Support :
    • Host Bridge VT82C598 and PCI-to-ISA bridge VT82C586
    • L2 Cache size 512 KB, 1 MB or 2 MB
    • PCI and AGP bus run synchronously
    • Full ECC and parity support
    • 5 PCI busmaster slots, AGP x2 support
    • Linear burst mode support for Cyrix/IBM CPUs

 

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Copyright © 1998 UCube Systems All rights reserved.
Last modified: August 24,1998

 




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