CoCoZilla Page NoCan3 Page NoCan2 Page Bottom Connector Page MPI Clone Page IDEZilla Page Pocket IDE Page 512K Schematic, BIG 828 x 1114. MFM HardDrive Page 4MHZ Page PLCC 6309 Page
Make a NitrOS-9 Boot Disk. NoCan3 Information Page Address Selection Page Pocket IDE Photos 4MHz PCB Page
Frequently Asked Questions NoCan3 Circuit Board Page NoCan2 PCB Page IDE PCB Page
I2C Page NoCan3 Jumpers Page NoCan2 Jumpers Page IDE CHS Driver Page
Update Your 26-3024 MPI for CoCo-3 Use Auto-Refresh No Excuses List IDE LBA Driver Page
HiDensity Modifications HiDensity Mod Text FIle
NoCan3 with I2C Bus Bart GIF Page Get the 26-3024 UpGrade GAL MPI 26-3124 UpGrade Page Back to the Thumbnail Page

 
Presented by: Only On Saturday Night
NoCan3 8MB Board, Click for large 656 x 305 Image.Here's the 8mb PCB. It's the same exact size as the NoCan series. In these old photos it is only partially stuffed, as you can see. Now it is fully stuffed and testing is complete. It all works and on the first time too, i.e. no mods or patches! This board lays on top of the CoCo-3 and plugs into the 6809E, 74LS245 sockets and into CN4, CN5, CN6 connectors.
Click for 678 x 196 Image.The funny overlapping sockets in the lower right are for the 16550 or 6551A option, user picks one. They are both wired to the MAX232 in parallel. Now folks can pick which real serial port chip they want to use, just plug it in.
Another Shot, this one without the Lattice CPLD.
Latest Image and is 954 x 568.Here is NoCan3 mounted on top of a repacked CoCo-3. Also note a popular Cloud-9 AT-keyboard interface and how they fit together without much interference, it just seemed to work out that way. In the photo: 16550 serial port chip, 68B21 printer port chip, MC68B09EP cpu, 74F245 buffer, 3 SMD buffers for cpu, one delay-line chip, Lattice CPLD, Cypress DAT SRAM, two each 4MB simms, MAX232 buffer, 1.8432MHz oscillator can, 74LS05 or equivalent for 16550 interrupt and reset, headers and jumper pins galore. This board uses 8mil runs and spaces for those of you who are interested.

The row of jumpers right behind the Lattice chip are configuration jumpers, ie user address selections for the I/O chips. Check the "Detail" button for more jumper info.

That reminds me, because only one serial chip is chosen, the left-over chip select is still active and available. I suppose that you could piggy-back a clock chip and use that un-used chip select. What clock-chip would you like to see? Right now I am investigating the Dallas 12C887, a bus oriented chip.



This page updated: 2000/05/08
Links removed, sorry.
  1