NoCan2 Rev E1
Paul T. Barton
Copyright: Only On Saturday Night
June 25, 1999
main page: http://www.geocities.com/idezilla/FirstCocozilla/index.html
this page: http://www.geocities.com/idezilla/FirstCocozilla/nocane1.html

[Installation][Chips][Headers][Jumpers][Parts needed]
[Pictures][Software][Suggestions][Included]
[Item Locations][Notes][VHDL - Rev 1C]

Notice:
    Soldering required! You must have the minimum of electronic technical
        grade soldering capabilities, i.e. you must be very good.

    Use standard anti-static handling procedures. If you don't know, find out.

    Be very careful of the pointy "stilt" pin-ends that plug into IC1 and IC3,
        they break.

Disclaimer:
    No guarantees as to NoCan2 function, useability, etc. If your coco-3 dies,
    I will not and cannot be held responsible for any hardware or software
    damaged by this circuit board. Use at your own risk.
    Besides, "If you open the coco-3 case, your warranty is void".
    (Whew!)

Included:
    Pre-tested NoCan2 Circuit Board,
        with coco-3 interconnect pins and "stilts" installed. No soldermask or silkscreeening.

    Documentation:
        Schematic of NoCan2 circuit board.
        Schematic, internals of Lattice PLD.
        Lazer plots of circuit board artwork, top and bottom.

    A NitrOS-9 single-sided 5.25" bootable floppy disk is included.
        Has sources for adding modules SerialPak, S1, PiaPak and Lpt1.
        This floppy will boot from OS9 into NitrOS-9, floppy only.
        Modules SerialPak and S1 are for testing only and are no means
            to be a full fledged driver. It will send and receive characters.
        PiaPak and Lpt1 are for the parallel printer port. They are
            tested for this function.

    1 each, custom 3 inch printer-cable.
        Corrects error in layout: Version E1. doh!

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Circuit Board Chips:
        Lattice ispLSI2064-80LJ, programmed.
            Version 1B. (will be Version 3A soon, after testing)
        Cypress SRAM.
            Either a Cy7C122-15 or a Cy7C150-15, my choice.
            Equivalent is the older 93422 16x4 SRAM.
        MAX232 or equivalent.
        1.8432MHz Oscillator clock.

    Jumpers and Headers for proper operation.

    Sockets installed on NoCan2:
        68B09E CPU, IC1, DIP-40 0.6".
        74LS245, IC3, DIP-20 0.3".
        Lattice PLD, 84 pin PLCC package.
        Cypress SRAM, DIP-22 0.4".
        Dual, angled, 1MB 30 pin SIMM's.
        6821 Pia, Parallel Port, DIP-40 0.6".
        16550 Serial Port, DIP-40, 0.6"
        MAX232 Serial Port Driver/Receiver, DIP-16 0.3".
        1.8432MHz Oscillator Clock, DIP-14 style.
            Error: This one IC came out 16-pin 0.4" spacing. double doh!

    Various Capacitors and Resistors:
        0.01uf ceramic cap, 1206-SMD, for the PLD.
        0.1uf ceramic cap, 1206-SMD, various places, for bypass.
        10uf 25V, electrolytic cap, bypass for +5V and Max232 voltage pumps.
        6.8K Resistor, 1206-SMD, CPU: address lines, R/W, E and Q pullups.
        2.2K Resistor, 1206-SMD, delay for SIMM A9.
        1.8K Resistor, 1206-SMD, for Green and Red LED's.
        47ohms Resistor, 1206-SMD, for SIMM RAS, SIMM CAS, SIMM A9 and Cy7c122 R/W.

    2 each, red-LED’s on 2 inch cables with square pin header connectors.
    1 each, 2-wire cable for NoCan2 to coco-3 interconnect.
    1 each, 1-wire cable for NoCan2 to coco-3 interconnect.
    1 each, socket for IC1 (68B09E). Goes on coco-3 motherboard.
    1 each, socket for IC3 (74LS245). Goes on coco-3 motherboard.
    1 each, 2-pin header. Goes on north side of IC15, pins 13 and 11.
    1 each, 1-pin header. Connects directly to the south side of R63.

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You Acquire:
    16550 Serial Port Chip, 40-pin DIP.
        I have tried: 8250, 82450, 16450, 16550 chips, all work.
    68B21 Pia, parallel port, 40-pin DIP.
    PC-type male DB9 serial port connector and cable with 2x5 pin header,
        for RS-232.
    Your choice of upgrading the 74LS245: 74ACT245, 74FCT245 or 74F245 for instance.
        My opinion: 'HCT' is too slow.

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Installation:
    Socket IC1 and IC3 on the coco-3 motherboard.
    Solder in the 1 pin header to R63 on the coco-3 motherboard. south end of R63.
    Solder in the 2 pin header to IC15 pins 13, 11 on the coco-3 motherboard.
        north side of IC15.

    Procedure to plug NoCan2 into coco-3:
        Start at the CPU end, look underneath NoCan2 while lining up NoCan2 "stilts"
            to the newly installed sockets on coco-3. Make absolutely sure that
            all of the "stilts" go into IC1 and IC3. If these do not line up,
            find out why before continuing.
        Push on NoCan2 to seat.
        Push on NoCan2 at the CN4, CN5 and CN6 places to seat.

    Connect 1-wire cable from R63 header to the NoCan2 pin marked "M".
        It is part of a 3-pin header, located by the SIMMs
        on the SIMMs south east corner.
    Connect 2-wire cable from IC15 to NoCan2 pins marked "H" and "V".
        This cable goes either way. "H" or "V" does not matter.
    Install 2 each, 1-MB memory SIMM’s. Pin 1 at west end.
    At your choice, install 68B21 and 16550 chips.
    Install your choice of 68B09E and 74LS245 chips, into NoCan2.
    Turn on power.
    Run test programs.

    IF: the pins on the "stilts" become bent, they may break.
        They are good for, MAYBE, one bend, re-straighten cycle.
        Extra pins are included to solder in as replacements.

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Suggestions:
    Clip out capacitors: C10, C11, C65 and C66 on coco-3.
        Would be done anyway for 512K upgrade.
        I also clipped out C61. On June 30, 1999, I tried to get another coco-3
        up and running with this board. It would not run until I clipped out C66.
    Install a fan directly on the coco-3 power supply heat sink,
        because the heatsink gets really HOT!

Maybe:
    Remove and save the two pull-up resistor packs, right at the game connector.
        Maybe install good quality single inline sockets for re-installation, later.
    Remove the RF-Can.

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Jumpers:
    BLK0: Sets address range for 68B21 Pia. No echoes.
        Jumper on selects address $FF60-6F
        Jumper off selects address $FF70-7F
        Has internal 50K pullup. Ok to leave open.

    N, E, W, S jumpers select:
        W: $FFx0-4, where "x" is either 6 or 7, selected above.
        S: $FFx5-7, where "x" is either 6 or 7, selected above.
        E: $FFx8-B, where "x" is either 6 or 7, selected above.
        N: $FFxC-F, where "x" is either 6 or 7, selected above.
        These are outputs. Ok to leave open.
        Do not install jumpers on all positions! That will break the PLD.

    BLK1: Sets address range for 16550 Serial Port.
        Has internal 50K pullup. Ok to leave open.
        Jumper on selects address $FF10-1F.
        Jumper off selects address $FF30-3F.
        The chip fills either location, echoes the second half.
            ie. $FF10-7 echoes at $FF18-F. Both valid.

    BLK2: Unused in version (1B) of PLD code.
        Has internal 50K pullup. Ok to leave open.
        Later revisions of the PLD (3A) will use BLK2
            and eliminate this 16550 echo.
        This will enable the 16550 to be either:
            Jumper on,  $FFx0-$FFx7.
            Jumper off, $FFx8-$FFxF.

    FAST: Selects 4MHz operation.
        Has internal 50K pullup. Ok to leave open.
        Only in 2MHz mode, not available in 1MHZ mode.
        Jumper on, Turbo mode off.
            Red LED not on.
        Jumper off, Turbo mode selected.
            Activated by selecting 2MHz, ie. POKE &HFFD9,0 or booting NitrOS-9.
            Red LED comes on.

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Headers:
    Green LED: (Suggested color)
        Use 2ma. or similar low-power LED, any color.
        Lit: Shows $FFD9, or fast mode, active.

    Red LED: (Suggested color)
        Use 2ma. or similar low-power LED, any color.
        Lit: Shows 4MHz mode in action.

    Header Description:
        Anode on west, Cathode on east. These have 1.8K resistors to +5VDC.
        Do not change the 1.8K resistor to a smaller value, it may break the PLD.

    Printer: Header 2x13, for (custom) printer cable adapter.

    Rs-232: Header 2x5, for standard PC-type DB-9M cable assembly.

    FIRQ: Connects both Serial Port and Pia outputs to FIRQ, directly.
        Jumper on, connected.
        Jumper off, no connection.
            The pullup resistor is on the coco-3 motherboard.

    MHV: Connects 28MHz and HSync with VSync to the PLD.

        West pin: 4MHz, marked "M".
              No pullup. Do not leave open!
              If 4MHz not wanted, connect "M" to NoCan2 ground plane.

        East pins: Hsync and Vsync inputs. Connect either way, not specific.
              No pullups, do not leave open! Needed for 2MB SIMM refreshing.

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Programs:

    Program 1:

        Try this program to check 4MHz.

        Do a "POKE &HFFD9,0".
        Then type "WIDTH 32" and type in and run this program,
        EXACTLY, no spaces!

        10A=0:TIMER=0
        20IFTIMER<60THENA=A+1:GOTO20
        30PRINTA:RUN

        Now remove the FAST jumper.
            The scrolling numbers should be around 265, average.
            That's about a 32% speed increase!

    Program 2:

        Try this program to check 2MB:

        10 POKE &HFFD9,0 ' go fast, mandatory!
        15 WIDTH 80 ' try other width's too.
        20 FOR I=0 TO 3 ' that's all that there is. 4 pages of 512K.
        30 POKE &HFF9B,I ' this swaps video pages.
        35 CLS(I+2) ' this changes background/foreground colors?
        40 FOR J=1 TO 600: NEXT J ' this wastes time so you can see.
        50 NEXT I
        60 GOTO 20

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Location of Items:
        Using the compass method:
            North is the back of the coco-3.
            West is the left side of the coco-3
            East is the game-slot side of the coco-3.
            South is the front of the coco-3.

        Lattice PLD: Center of the board. looks like a larger GIME, 84 pins.
            Pin 1 at center of west edge. Look for dimple.
        Cypress SRAM: north east of the PLD. 22-pins by 0.4 inch DIP.
            Pin 1 at south west corner.
        MHV Header: South center, left of bump-out.
        BLK0, BLK1, BLK2 headers: North of the PLD.
        N, E, W, S jumpers: west of the PLD.
        FAST header: north west of the PLD. Has internal 50K pullup.
            Ok to leave open.
        Green, Red LED headers: west of the PLD's north west corner.
        1.8K Resistor for Green LED, 2nd resistor north of the green header.
        1.8K Resistor for Red LED, 1st resistor north of the green header.
         FIRQ jumper: immediately west if the CPU. by CPU pins 3 and 4.
        1MB SIMMs: The south west corner. Dual, angled socket. Pin 1 at west end.
        Max232: south, right of center, in the bump-out area.
            Pin 1 at south west corner.
        RS-232 header: north of the max232. Pin 1 at south west corner.
        1.8432MHz oscillator: south of the max232. Pin 1 at south west corner.
        16550: east of the max232. Pin 1 on north east corner.
        6821: along east edge of board. Pin 1 at north west corner.
        74LS245: immedciately west of the 6821. Pin 1 at north west corner.
        CPU: immediately west of the 74LS245. Pin 1 at north west corner.
        Address Buffers: south east of the PLD. Pin 1 at south east corner.
        E and R/W Buffers: north and between the 6821 and the CPU.
            Pin 1 at south west corner.

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Pictures:

NoCan2 Parts Layout
My Questions to You:
    1. Would you like further decoding of 6821 and 16550?
        For instance: allow 16550 to be in either of: $ff1x, $ff3x, $ff6x or $ff7x.
        Ditto the 6821.

Notes:
    The 3 flying orange wires on the bottom of NoCan2:
        To replace missing wires lost from the layout database. triple doh!

    The colored wires tying pins 1 and 20 of the address buffers and the R/W buffer:
        The chips, 74ACT245, wired as 74ACT541 parts.
        The '245 direction pin then must be set to match the '541 direction.

    The 2.2K (2.4K?) timing resistor:
        Just south of BLK0 header, is to set the delay for 70ns 1MB simms.
        So far, it does not need to be adjusted, ever.
        If other SIMMs are used, the value can be changed,
        but not over 3.0K or never less than 2.2K!
        This adjusts the A9 setup and hold time between the RAS falling edge
        and the CAS falling edge.

    4MHz:
        Is actually around 4.77MHz as spliced in Q and E clocks.
        This may be why the 68x09E's won't work.
        Each spliced in Q and E high time is 1.5 cycles of
            the 28.63636MHz main clock.
        Each 1/2 cycle of 28.63636MHz is 34.92ns,
            so take that times 6 and flip it over.
        Comes out 4.77272666666666666666666666666667MHz, and that's close enough.
NoCan2 BarCode :-)
End of Document.

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