The 80286 Microprocessor
:
Hardware, Software &
Interfacing
by : Avtar Singh, Walter
A. Triebel
(C) 1990, Prentice Hall
International
Contents
PREFACE
xiii
1 INTRODUCTION TO MICROPROCESSORS
AND
MICROCOMPUTERS
1
1.1 Introduction 1
1.2 The IBM Personal Computer: A Reprogrammable Microcomputer 2
1.3 General Architecture of a Microcomputer System 4
1.4 Software: The Computer Program 6
1.5 Evolution of the Intel Microprocessor Architecture 11
2 REAL-ADDRESSED MODE SOFTWARE ARCHITECTURE OF
THE
80286 MICROPROCESSOR
18
2.1 Introduction 18
2.2 Real-Mode Software Model of the 80286 Microprocessor 19
2.3 Real-Mode Memory Address Space and Data Organization 20
2.4 Data Types 22
2.5 Segment Registers and Memory Segmentation 25
2.6 Dedicated and General Use of Memory 27
2.7 Instruction Pointer 28
2.8 Data Registers 29
2.9 Pointer and Index Registers 30
2.10 Flags Register 31
2.11 Generating a Real-Mode Memory Address 32
2.12 The Stack 35
2.13 Input/Output Address Space 37
2.14 Addressing Modes of the 80286 Microprocessor 38
3 80286 MICROPROCESSOR
PROGRAMMING 1
57
3.1 Introduction 57
3.2 The 80286's Instruction Set 57
3.3 Data Transfer Instructions 58
3.4 Arithmetic Instructions 72
3.5 Logic Instructions 94
3.6 Shift Instructions 98
3.7 Rotate Instructions 101
4 80286
MICROPROCESSOR PROGRAMMING 2
111
4.1 Introduction 111
4.2 Flag Control Instructions 111
4.3 Compare Instruction 117
4.4 Jump Instructions 122
4.5 Subroutines and the Subroutine Handling Instructions 133
4.6 The Loop and the Loop Handling Instructions 152
4.7 Strings and the String Handling Instructions 160
5 THE 80286 MICROPROCESSOR: PROTECTED MODE
OPERATION
172
5.1 Introduction 172
5.2 Protected-Mode Register Model of the 80286 Microprocessor 173
5.3 Protected-Mode Memory Management and Address Translation 182
5.4 Descriptors 187
5.5 Protected-Mode Instructions 192
5.6 Multitasking and Protection 195
6 THE 80286 MICROPROCESSOR
AND ITS MEMORY
INTERFACE
209
6.1 Introduction 209
6.2 The 80286 Microprocessor 210
6.3 Interfaces of the 80286 211
6.4 The 82288 Bus Controller: Generation
of the Memory/IO Control Signals 216
6.5 System Clock 219
6.6 The Bus Cycle and Bus States 221
6.7 Hardware Organization of the Memory Address Space 224
6.8 Memory Interface 227
6.9 Read and Write Bus Cycle Timing 230
6.10 Program and Data Storage Memory Circuits 234
7 INPUT/OUTPUT INTERFACE
OF THE 80286
MICROPROCESSOR
243
7.1 Introduction 243
7.2 The Input/Output Interface and I/O Address Space 243
7.3 Input and Output Bus Cycle Timing 247
7.4 Input/Output Instructions 250
7.5 8255A Programmable Peripheral Interface (PPI) 254
7.6 8255A Implementation of Parallel I/O Ports 265
7.7 Memory-Mapped I/O 268
7.8 The 8253 Programmable Interval Timer 271
7.9 The 8237A Programmable Direct Memory Access Controller 284
8 INTERRUPT AND EXCEPTION PROCESSING OF THE 80286
MICROPROCESSOR
302
8.1 Introduction 302
8.2 Types of Interrupts and Exceptions 303
8.3 Interrupt Vector and Interrupt Descriptor Tables 304
8.4 Interrupt Instructions 308
8.5 Masking of Interrupts 311
8.6 External Hardware Interrupt Interface 311
8.7 External Hardware Interrupt Sequence 313
8.8 The 8259A Programmable Interrupt Controller 322
8.9 Interrupt Interface Circuits Using the 8259A 335
8.10 Nonmaskable Interrupt 339
8.11 Reset 340
8.12 Internal Interrupt and Exception Functions 343
9 IBM PC AT MICROCOMPUTER
HARDWARE
353
9.1 Introduction 353
9.2 Architecture of the IBM PC AT System Processor Board 353
9.3 System Processor Circuitry 359
9.4 I/O and Memory Chip Select Circuitry 370
9.5 Memory Circuitry 378
9.6 Input/Output Circuitry 385
9.7 Interrupt Interface Circuitry 387
9.8 Timer Circuitry 390
9.9 Direct Memory Access Circuitry 392
SUGGESTED LABORATORY ASSIGNMENTS
399
Laboratory 1 : Exploring the Software Architecture of the
80286 Microprocessor 399
Laboratory 2 : Assembling and Executing Instructions with DEBUG 404
Laboratory 3 : Loading, Executing, and Debugging Programs 405
Laboratory 4 : Working with the Data Transfer, Arithmetic,
Logic, Shift, and Rotate Instructions 409
Laboratory 5 : Working with the Flag Control, Compare, Jump,
Subroutine, Loop, and String Instructions 414
Laboratory 6 : Calculating the Average of a Series of Numbers 420
Laboratory 7 : Sorting a Table of Data 426
Laboratory 8 : Generating Elements for a Mathematical Series 433
Laboratory 9 : Exploring the Memory Subsystem of the IBM PC AT 439
Laboratory 10 : Exploring the I/O Subsystem of the IBM PC AT 443
ANSWERS TO SELECTED ASSIGNMENTS
450
BIBLIOGRAPHY
465
INDEX
467
Preface
The 80286 Microprocessor
:
Hardware, Software &
Interfacing
Today the 80286 is the 16-bit microprocessor from Intel's 8086 architecture that is most widely used in modern personal computer systems. For instance, it is the microprocessor employed in IBM's popular personal computer advanced technology (PCAT). The 80286 is also used in many other manufacturers' personal computers as well as a wide variety of other electronic equipment.
The 80286 Microprocessor: Hardware, Software, and Interfacing is written for use as a textbook in courses on 16-bit microprocessors at vocational schools, colleges, and universities. It is intended for use in a one-semester course in microprocessor technology that emphasizes both assembly language software and microcomputer circuit design. Moreover, its intended use is in a program that employs the IBM PCAT (or an MSDOS compatible) as the laboratory tool.
Individuals involved in the design of microprocessor-based electronic equipment need a systems-level understanding of the 80286 microcomputer—that is, a thorough understanding of both its software and hardware. The first half of the book explores the real-mode and protected-mode software architectures of the 80286 microprocessor and teaches the reader how to write, execute, and debug assembly language programs. The four things needed to learn to be successful at writing assembly language programs for the 80286 are the following:
All of this material is developed in detail in Chapters 2 through 4.
The study of software architecture, instruction set, and assembly language programming is closely coupled with using the DEBUG program on the PCAT. That is, the line-by-line assembler in DEBUG is used to assemble instructions and programs into the memory of the PCAT, while other DEBUG commands are used to execute and debug the programs. The reader may reference the book IBM PC 18088 Assembly Language Programming, Avtar Singh and Walter A. Triebel, Prentice Hall (1985) for information on how to use DEBUG and the IBM Macro Assembler (MASM). Alternate references are IBM's DOS and Macro Assembler reference manuals.
Chapter 5 is a detailed study of the 80286's advanced protected-mode architecture. Here we begin by introducing the protected-mode register model. This is followed by a detailed study of the function of the 80286's memory management unit, virtual addressing, and the translation of virtual addresses to physical addresses. The various types of descriptors supported by the 80286 are covered and how they relate to memory management and the protection model. The instructions of the protected-mode system control instruction set are described. Finally, the concepts of the task, task switching, and multitasking system environment are explored.
The second half of the book examines the hardware architecture of microcomputers built with the 80286 microprocessor. To understand the hardware design of an 80286-based microcomputer system, the reader must begin by first understanding the function and operation of each of its hardware interfaces: memory, input/output, and interrupt. After this, the roles of each of these subsystems can be explored relative to overall microcomputer system operation. It is this material that is presented in Chapters 6 through 9.
We begin in Chapter 6 by examining the architecture of the 80286 microprocessor from a hardware point of view. This includes information such as pin layout, primary signal interfaces, signal functions, and clock requirements. The latter part of Chapter 6 covers the memory interface of the 80286. This material includes extensive coverage of memory bus cycles, address maps, 82C284 clock generator IC, 82288 bus controller IC, memory interface circuits, and program and data storage memory subsystems.
This hardware introduction is followed by separate studies of the architectural characteristics, operation, and circuit designs for the input/output and interrupt interfaces of the 80286-based microcomputer in Chapters 7 and 8, respectively. This material includes information such as the function of the signals at each of the interfaces, input/output and interrupt acknowledge bus cycle activity, real- and protected-mode operation. and examples of typical interface circuit designs. Included in these chapters is detailed coverage of the VLSI peripheral ICs, such as the 8255A, 8253, 8237A, and 8259A.
The hardware design section closes in Chapter 9 with a study of the 80286-based microcomputer design used in the IBM PCAT. It presents the circuitry used in the design of the memory subsystem, input/output interfaces, and interrupt interface on the system processor board of the PCAT. This chapter demonstrates a practical implementation of the material presented in the prior chapters on microcomputer interfacing techniques.
Ten laboratory assignments are included at the back of the book. These exercises are to be performed on either an IBM PCAT or a PCAT compatible. The first three laboratories are to be done after completing Chapter 2. With these exercises, the reader explores the software architecture of the 80286-based microcomputer, assembles and disassembles instructions and programs, and loads, executes, and debugs a program. Laboratories 4 and 5 study the operations performed by the instructions in the 80286's instruction set. Laboratory 4 should be performed after reading Chapter 3 and laboratory 5 at the end of Chapter 4.
The next three laboratories demonstrate the process of writing a complete program for an application. Laboratory 6 is an application in which a program is used to calculate the average of a series of numbers, laboratory 7 demonstrates how a table of random data can be sorted, and laboratory 8 shows how to generate the elements of a Fibonacci series.
The last two laboratories examine hardware aspects of the IBM PC AT's 80286-based microcomputer: memory subsystem (laboratory 9) and I/O subsystem (laboratory 10). These exercises should be performed after completing Chapter 8.
Supplementary materials available from Prentice Hall are a solutions
manual and a DOS 3.1 compatible diskette that contains all the programs used in
the book.
Walter A. Triebel
Avtar Singh
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- by : David Setya Atmaja
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