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Why you should always tie unused input pins to GND or VCC
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Can prevent excessive power dissipation because noise on input can cause
the input stage to switch states at high frequency. CMOS dissipates power
only when switching from one state to the other.
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Letting inputs float is not too bad with TTL inputs because they sortof have
pullup resistors built in. It's not a good idea with CMOS inputs because
there are usually no inherent pull-up or pull-down resistors. The input can
float to any voltage, depending upon leakages to ground and the supply. Somewhere
(actually, mostly everywhere) in the middle, the CMOS inverter or gate to
which the input is connected goes into an indefinite and high power dissipation
mode, with both N- and P-channel outputs conducting. This causes extra power
dissipation and noise inside the chip.
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Why you should always tie unused input pins to GND or VCC via a resistor
(not directly)
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might actually be or become an output pin. Many processors can (sometimes
accidentally) change inputs to outputs
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reduce coupling of power supply noise to that point in the circuit.
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stops gate voltages rising faster than any internal supply rails for any
devices that can latch-up and so prevent an occasional failure due to bond
wires melting. Latch-up is a danger in chips that have parasitic thyristors
as an artifact of the manufacturing process.
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having a resistor on all unused inputs facilitates testing. Even if the gate
has no effect on whether the product will work or not, companies like to
run the standard test routine for testing each part on their ICT (in-circuit
tester), so the ability to drive all inputs to an arbitrary state is needed.
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makes temporary changes easier during test and debug
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NOTE: Pull down to GND vc pull up to VCC consumes %15 less power
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Despike your chips.
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This means putting a .01 to .1 uFd ceramic capacitor from the +5 volt supply
to ground right at the chip. power line spikes occur when there are sudden
current changes far from the power supply, and it's amazing how much trouble
this can cause. Reguarding capacitors:
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Watch out for class 'X' and class 'Y' capacitors
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which are designed for connection to mains voltages. These are fail safe
capacitors which are self healing and must be replaced with the same type.
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Replacing electrolytic caps with much higher voltage rated devices can upset
circuit operation.
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Electrolytics don't start behaving as proper capacitors until they reach
a fraction of their rated voltage. Also look out for special low ESR (equivalent
series resistance) capacitors found in switch mode power supplies.
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Some circuits require capacitors capable of withstanding large current pulses.
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Using the wrong sort of cap in this situation would lead to overheating and
other nasty consequences.
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Make good power supply and ground connections.
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A skinny, daisy-chained wire-wrap connection from chip to chip is probably
not going to be enough. The more robust you can make power supply and ground
leads, the better
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Keep your digital and analog circuitry physically separate whenever you can.
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Digital switching, especially at microprocessor buss or video card speeds,
can throw all sorts of noise and trash into analog or audio circuitry.
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Don't use silicon sealant to mount wire-wrap sockets or to seal/insulate
circuitry.
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This stuff is handy and common but it is not an insulator. It will leak small
currents, which may not matter in logic circuits but can wreak havoc in
high-impedance analog circuits.
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Make sure you can get the parts before basing a design on it.
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You may find the ideal integrated circuit for your application in a data
book, but it may not be in production, may be unavailable from distributors,
or may be too expensive. Especially if you are creating a design you hope
to produce for a while, it's wise to choose devices that are widely available
and that (you hope) won't be discontinued.
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NEVER plug untested circuitry into a computer backplane slot!!!
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Never never never, if you love your PC. All it takes is a simple little wiring
error and your motherboard and disk controllers will be toast. While IBM-PC/AT
buss interfacing isn't rocket science, it's all too easy to do expensive
damage to your machine. Consider other interfacing methods (parallel/serial
ports, commercial control/data acquisition boards) first. There are buffer
cards that transparently permit prototypes cards to be used while protecting
the computer buss, but they are not cheap.
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Use IC sockets on prototypes.
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After you have things debugged, you might consider soldering chips directly
to boards to save cost and eliminate connections that can oxidize or come
loose, but during the design/testing phase you need to be able to swap chips
without repeated desoldering.
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Pick chip types with the correct switching speed for your design
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digital logic chips having very fast edge speeds (dV/dt), such as 74S, 74AS,
74F, and, best of all, 74FACT are needed for super high frequecy, low propagation
designs but can cause RF crosstalk and interferrence (especially in poorly
designed or laid out cicuits) that will frustrate the most brilliant engineer.
See Signal Levels@
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DON'T TRUST THE INFORMATION IF THE DATA SHEET IS LABELED "Preliminary
Information".
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This means that the data sheet was written before the chip was actually in
production, and the device may change significantly by the time it is actually
released. The device performance may be different; still more important,
the pinout may be completely rearranged in the final design. Preliminary
data can help you choose a device but don't set your design in stone based
on it
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Protect against incorrect (reversed) insertion of batterys
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Appling Vcc to the GND and Gnd to the Vcc will fry just about anything. Use
of a fuse (or one of the PTC thermal auto-resetting devices from Bourns
or Littlefuse) and a diode is a minimum. You can take an enhancement power
MOSFET and put in the negative return line from your circuit. The N-Chanel
Enhancement MOSFET is used "upside down" compared to other circuits. That
is to say, the Drain is connected to -ve, Source through the load to +ve,
and gate to +ve. The gate is driven through a 1 Meg resistor from the positive
supply terminal. A correct power connection drives the MOSFET fully ON, and
everything works. Reversing the supply connections turns the MOSFET OFF,
and no current flows and you're protected. Correct the power connections,
and you're back to normal. Select a MOSFET with a low "R(on)" resistance,
and there will be very little voltage drop.The better way to go about this
is to protect reversal based on the mechanical properties of the battery.
mostly this is done by a positive battery terminal that is set back in the
holder so only the positive battery pole that sticks out can reach it.
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Cover the window on any chip with EPROM even if you don't care about the
EPROM part of the chip
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PIC processors for example are sometimes affected by non-uv light entering
the EPROM window and shineing on the silicon.
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Don't use simulators
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Simulations are doomed to succeed. Reversed biased
Transisters are a good example.
Signal Levels@
Surface Mount Devices@
See also: