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Computer Microprocessor Design
In this lab we studied the concept of pipelining using the MIPS instruction subset. We also learned about the problems that pipelining introduces and the advanced techniques that can be used to overcome the difficulties encountered in pipelined machines.
The instruction set for the RISC CPU is as follows.Opcode Function Mnemonic Operation
000 0000 add rd = rs + rt
0001 sub rd = rs - rt
0010 and rd = rs & rt
0011 or rd = rs | rt
0101 sll rd = rs << 1 (logical)
0101 srl rd = rs >> 1 (logical)
0110 sra rd = rs >> 1 (arithmatic)
0111 slt rd = 1 if (rs < rt); else rd = 0
1000 jr pc = rs
001 addi rt = rt + offset[7]
010 j pc = offset[13]
011 jal r7 = pc + 2; pc = offset[13]
100 lw rt = *(rs + offset[7])
101 sw *(rs + offset[7]) = rt
110 beq if (rs == rt) pc = pc + offset[7] + 2
111 bne if (rs != rt) pc = pc + offset[7] + 2
Requirements:
The pipeline should be functioning properly and can solve Data Hazards and Branch Hazards problems as it occurs in the instruction set. Pipeline should also solve these hazards not by Stalling, but by taking full advantage of Forwarding and flushing.
Constraints:
Pipeline improves the performance by increasing the instruction throughput, but there are certain problems that are associated with this technique. They are as follows:
1. The pipeline execution cycle must have the worst clock cycle to accommodate the slowest operation. Even though some stages do not require as much time.
2. Although, one instructions begins each clock cycle, an individual instruction still takes five clock cycles to complete. Not all instructions need five stages so this part of pipeline wastes time.
3. It takes four clock cycles before the five stage pipeline is operating at full efficiency.
4. We have to use Stall for loading and that slows the pipeline.
5. To solve Branch Hazard we do not have an efficient technique developed. Just as we have Forwarding for resolving Data Hazards. Thus, every time there is a branch instruction it slows the pipeline tremendously.
6. It is hard to design a fully operating and fully efficient pipeline that will take care of all sorts of Hazards.