Home Page Of Abdulhakim Ahmed
One Of The Best Junior RFIC Designers You Can Get!!
An Example of my work:
a 4-flipflop Random-Bit Generator.
Here's my Resume for those who would like to hire a hard-working quick-learning Junior RFIC designer who knows Cadence like the back of his hand:
My 4th year Electrical Engineering Project at Carleton University:

GSM-band reject Low Noise Amplifier (LNA)

Properties:

  • CMOS 0.35 micron technology
  • 2.2mA current consumption
  • 3.3V voltage source
  • -40dB attenuation at 1.9GHz
  • 30dB (S21) Gain at 2.44GHz
  • 1dB-compression Point of -17dBm
  • input referred IP3 of 5dBm
  • Noise Figure of 3.3dB
  • S11 of -18dB
  • S22 of -20dB

    The extracted layout of the LNA has been simulated using Cadence Design Systems provided by Carleton University and Canadian Microelectronics Corporation.

    The LNA circuit topology and design is going to be patented, and therefore I cannot show you the schematic or layout of my LNA circuit.
    		•
    Resume
    E-mail: aahmed@connectmail.carleton.ca

    Please come back and visit me soon.
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